1. Field
Some example embodiments of the inventive concepts relate to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a semiconductor device including an air gap formed between conductive layers thereof.
2. Description of the Related Art
When a relatively high integration semiconductor device is manufactured, a parasitic capacitance component is generated between adjacent layers thereof, thereby degrading the performance and reliability of the semiconductor device.
To reduce the parasitic capacitance component, a dielectric material having a low dielectric constant may be interposed between the adjacent layers. In this case, a space between the adjacent layers may be kept as an air gap to effectively further reduce the parasitic capacitance between the adjacent layers.